Conventional flash technology based cache device (e.g. SSD) is commonly used to cache frequently accessed “hot” data so that a host (application) access time for the “hot” data is improved. However, flash technology based devices can sustain only a limited number of writes before the flash storage area becomes unreliable or bad. The time when the cache device can sustain the writes reliably is also called a lifetime. After the cache device exhausts the lifetime, the cache device is either bypassed, thereby impacting performance, or the cache device needs to be physically replaced and rebuilt. To extend the lifetime of the cache device, the number of writes to the cache device is minimized. Conventional approaches for handling a cache miss during read includes a read-fill of a complete cache-line. A certain amount of read-fill is needed to improve performance. However, if read I/O operations are completely random then this results in wasted write cycles and this reduces the life of flash memory.
It would be desirable to implement a more controlled amount of read-fill to improve performance and/or to prevent unnecessary writes to a flash memory.